A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures (Computer Science)

A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures (Computer Science)

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Product Description

A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures (Computer Science)

Technical Specifications

Country
USA
Brand
Springer
Manufacturer
Springer
Binding
Hardcover
PartNumber
Refer to Sapnet.
Height
0.51
Length
6.22
Weight
0.72091159674
Width
7.54
NumberOfItems
1
Author
Dunn, Ian N, Meyer, Gerard G L